mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 384

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Register Descriptions
17.3.2 Power Mode Control Register (SMC_PMCTRL)
The PMCTRL register controls entry into low power run and stop modes, provided that
the selected power mode is allowed via an appropriate setting of the protection
(PMPROT) register.
384
Reserved
Reserved
Reserved
Reserved
AVLLS
AVLP
ALLS
Field
7–6
5
4
3
2
1
0
This register is reset on Chip POR not VLLS and by reset types
that trigger Chip POR not VLLS. It is unaffected by reset types
that do not trigger Chip POR not VLLS. See the
for more information.
This read-only bitfield is reserved and always has the value zero.
Allow very low power modes
Provided the appropriate control bits are set up in PMCTRL, this write-once bit allows the MCU to enter
any very low power modes: VLPR, VLPW, and VLPS.
0
1
This read-only bit is reserved and always has the value zero.
Allow low leakage stop mode
This write once bit allows the MCU to enter any low leakage stop mode (LLS) provided the appropriate
control bits are set up in PMCTRL.
0
1
This read-only bit is reserved and always has the value zero.
Allow very low leakage stop mode
Provided the appropriate control bits are set up in PMCTRL, this write once bit allows the MCU to enter
any very low leakage stop mode: VLLS3, VLLS2 and VLLS1.
0
1
This read-only bit is reserved and always has the value zero.
VLPR, VLPW and VLPS are not allowed
VLPR, VLPW and VLPS are allowed
LLS is not allowed
LLS is allowed
VLLS3, VLLS2 and VLLS1 are not allowed
VLLS3, VLLS2 and VLLS1 are allowed
MCF51JF128 Reference Manual, Rev. 2, 03/2011
SMC_PMPROT field descriptions
Preliminary
NOTE
Description
Reset
details
Freescale Semiconductor, Inc.