mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 730

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Register Definition
730
FFFF_854C Interrupt Delay Register (PDB0_IDLY)
FFFF_855C Channel n Delay 1 Register (PDB0_CH0DLY1)
FFFF_856C Pulse-Out n Delay Register (PDB0_PO0DLY)
FFFF_8540
FFFF_8544
FFFF_8548
FFFF_8550
FFFF_8554
FFFF_8558
FFFF_8560
FFFF_8564
FFFF_8568
Absolute
address
(hex)
Status and Control Register (PDB0_SC)
Modulus Register (PDB0_MOD)
Counter Register (PDB0_CNT)
Channel n Control Register 1 (PDB0_CH0C1)
Channel n Status Register (PDB0_CH0S)
Channel n Delay 0 Register (PDB0_CH0DLY0)
DAC Interval Trigger n Control Register (PDB0_DACINTC0)
DAC Interval n Register (PDB0_DACINT0)
Pulse-Out n Enable Register (PDB0_PO0EN)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Register name
PDBx memory map
Preliminary
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
R
Freescale Semiconductor, Inc.
0000_FFFFh
0000_FFFFh
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
Section/
33.3.10/
33.3.11/
33.3.12/
33.3.1/
33.3.2/
33.3.3/
33.3.4/
33.3.5/
33.3.6/
33.3.7/
33.3.8/
33.3.9/
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