mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1117
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mcf51jf128
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Mcf51jf128 Reference Manual
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Freescale Semiconductor, Inc
Datasheet
1.MCF51JF128.pdf
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1. The address bit identifies the frame as an address character. See
43.4.4.2 Nine-bit configuration
When UARTx_C1[M] is set and UARTx_C4[M10] is cleared the UART is configured
for 9-bit data characters. The 9th bit is either UARTx_C3[T8/R8] or the internally
generated parity bit if UARTx_C1[PE] is enabled. This results in a frame consisting of a
total of 11 bits. In the event that the 9th data bit is selected to be UARTx_C3[T8] it will
remain unchanged after transmission and can be used repeatedly without rewriting it
unless the value needs to be changed. This feature may be useful when the 9th data bit is
being used as an address mark.
When UARTx_C1[M] is set and UARTx_C4[M10] is set the UART is configured for 9-
bit data characters, but the frame consists of a total of 12 bits. The 12 bits include the start
and stop bits, the 9 data character bits and a 10th internal data bit. Note that if
UARTx_C4[M10] is set UARTx_C1[PE] must also be set. In this case, the 10th bit is the
internally generated parity bit. The 9th bit is can either be used as a address mark or a 9th
data bit.
Refer to the following table.
Freescale Semiconductor, Inc.
UART_C1[PE]
C1[PE]
0
0
0
0
0
1
1
1
1
1
0
0
1
UC1[M]
0
0
1
1
1
0
0
1
1
1
Table 43-104. Configuration of 9-bit data formats
Table 43-103. Configuration of 8-bit data format
Start
bit
1
1
1
MCF51JF128 Reference Manual, Rev. 2, 03/2011
C1[M10]
0
1
0
0
1
0
1
0
1
1
Data
bits
8
7
7
Start
bit
1
1
1
1
1
Chapter 43 Universal Asynchronous Receiver/Transmitter (UART)
Preliminary
Data
bits
Address
Receiver
9
8
8
9
8
bits
1
0
0
See
See
1
Invalid Configuration
Invalid Configuration
Invalid configuration
Eight-bit configuration
Eight-bit configuration
wakeup.
Address
bits
1
1
0
0
0
1
2
Parity
bits
0
0
1
Parity
bits
0
0
1
1
1
Stop
bit
1
1
1
Stop
bit
1
1
1
1
1
1117
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