mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 929

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

38.4.5 SPI Transmission by DMA
SPI supports both Transmit and Receive by DMA. The basic flow of SPI transmission by
DMA is as below.
Freescale Semiconductor, Inc.
Figure 38-35. SPIH:L write side structural overview in FIFO mode
Figure 38-36. Basic Flow of SPI Transmission by DMA
Control
Read
MCF51JF128 Reference Manual, Rev. 2, 03/2011
SPI Data Register
FIFO Ctrlr
Read Access
Wait for interrupt(s) of DMA Controller
Set TXDMAE/RXDMAE=1 to enable
indicating end of SPI transmission
Configure SPI before Transmission
Set SPE=1 to start transmission in
master mode or enable SPI for
Configure DMA Controller
Transmit/Receive by DMA
transmission in slave moe
spidh:l_tx_reg
for SPI Transmission
shfr_tx_reg
Preliminary
RESET
TX- FIFO
FIFO depth = 8 bytes
IPBus (ips_rdata[7:0])
SPI_CORE_SHFR
Chapter 38 Serial Peripheral Interface (SPI)
SPI_REG_BLOCK
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