mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 778

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map/Register Definition
36.6.4 CMT Carrier Generator Low Data Register 2 (CMT_CGL2)
This data register contain the secondary low value for generating the carrier output.
Address: CMT_CGL2 is FFFF_8420h base + 3h offset = FFFF_8423h
* Notes:
•
36.6.5 CMT Output Control Register (CMT_OC)
This register is used to control the IRO signal of the CMT module.
Address: CMT_OC is FFFF_8420h base + 4h offset = FFFF_8424h
778
x = Undefined at reset.
Field
Reset
Field
Reset
7–0
Read
7–0
Read
Write
Write
SH
SL
Bit
Bit
IROL
Secondary Carrier High Time Data Value
When selected, these bits contain the number of input clocks required to generate the carrier high time
period. When operating in Time mode, this register is never selected. When operating in FSK mode, this
register and the primary register pair are alternately selected under control of the modulator. The
secondary carrier high time value is undefined out of reset. These bits must be written to nonzero values
before the carrier generator is enabled when operating in FSK mode.
Secondary Carrier Low Time Data Value
When selected, these bits contain the number of input clocks required to generate the carrier low time
period. When operating in Time mode, this register is never selected. When operating in FSK mode, this
register and the primary register pair are alternately selected under control of the modulator. The
secondary carrier low time value is undefined out of reset. These bits must be written to nonzero values
before the carrier generator is enabled when operating in FSK mode.
x*
7
7
0
CMTPOL
x*
0
6
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
CMT_CGH2 field descriptions
CMT_CGL2 field descriptions
IROPEN
x*
0
5
5
Preliminary
x*
0
4
4
Description
Description
SL
x*
0
3
3
x*
0
0
2
2
Freescale Semiconductor, Inc.
x*
0
1
1
x*
0
0
0