mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 972

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory Map/Register Definitions
39.4.15 Address Register (USBx_ADDR)
The Address Register holds the unique USB address that the USB Module decodes when
in Peripheral mode (HOSTMODEEN=0). When operating in Host mode
(HOSTMODEEN=1) the USB Module transmits this address with a TOKEN packet.
This enables the USB Module to uniquely address an USB peripheral. In either mode, the
USB_EN bit within the control register must be set. The Address Register is reset to 0x00
after the reset input becomes active or the USB Module decodes a USB reset signal. This
action initializes the Address Register to decode address 0x00 as required by the USB
specification.
Addresses: USB0_ADDR is FFFF_9000h base + 98h offset = FFFF_9098h
972
LSEN
HOSTMODEEN
USBENSOFEN
Reset
Field
Read
Write
7
RESUME
ODDRST
Bit
Field
3
2
1
0
LSEN
Low Speed Enable bit
7
0
When set to 1, this bit enables the USB Module to operate in Host mode. In host mode, the
USB module performs USB transactions under the programmed control of the host processor.
When set to 1 this bit enables the USB Module to execute resume signaling. This allows the
USB Module to perform remote wake-up. Software must set RESUME to 1 for the required
amount of time and then clear it to 0. If the HOSTMODEEN bit is set, the USB module
appends a Low Speed End of Packet to the Resume signaling when the RESUME bit is
cleared. For more information on RESUME signaling see Section 7.1.4.5 of the USB
specification version 1.0.
Setting this bit to 1 resets all the BDT ODD ping/pong bits to 0, which then specifies the EVEN
BDT bank.
USB Enable
Setting this bit causes the SIE to reset all of its ODD bits to the BDTs. Therefore, setting this bit
resets much of the logic in the SIE. When host mode is enabled, clearing this bit causes the
SIE to stop sending SOF tokens.
0 The USB Module is disabled.
1 The USB Module is enabled.
USBx_CTL field descriptions (continued)
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
USBx_ADDR field descriptions
Table continues on the next page...
0
5
Preliminary
0
4
Description
Description
ADDR
0
3
0
2
Freescale Semiconductor, Inc.
0
1
0
0

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