mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 784

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Functional Description
36.6.12 CMT Direct Memory Access (CMT_DMA)
This register is used to enable/disable direct memory access (DMA).
Address: CMT_DMA is FFFF_8420h base + Bh offset = FFFF_842Bh
36.7 Functional Description
The CMT module consists primarily of clock divider, carrier generator and modulator.
36.7.1 Clock Divider
The CMT was originally designed to be based on 8 MHz bus clock that could be divided
by 1, 2, 4 or 8 times accordingly with the specification. To be compatible with higher bus
frequency, the Primary Prescaler (PPS) was developed to receive a higher frequency and
generate a clock enable signal called Intermediate Frequency (IF). This IF should be
approximately equal to 8 MHz and will work as a clock enable to the Secondary
Prescaler. The following figure shows the clock divider block diagram.
784
Reserved
DMA
Reset
Field
Read
7–1
Write
0
Bit
This read-only bitfield is reserved and always has the value zero.
DMA Enable
This bit enables the DMA protocol.
0
1
7
0
DMA transfer request and done are disabled
DMA transfer request and done are enabled
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
CMT_DMA field descriptions
0
5
Preliminary
0
0
4
Description
0
3
0
2
Freescale Semiconductor, Inc.
0
1
DMA
0
0