mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 867

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

37.4.11.5 CnVH:L Registers Synchronization
The CnVH:L synchronization occurs when the CnVH:L registers are updated with the
value of their write buffer.
The synchronization requires both bytes of CnVH:L to have been written, SYNCEN = 1
and either a hardware or software trigger event as per MODH:L synchronization
(MODH:L Registers
Freescale Semiconductor, Inc.
• If PWMSYNC = 1, then the synchronization is made on the next selected boundary
Figure 37-185. MODH:L Synchronization when (PWMSYNC = 0), (REINIT = 1), and (a
cycle after the enabled software trigger event takes place. The SWSYNC bit is
cleared on the next selected boundary cycle (refer to the following figure).
selected boundary cycle
Figure 37-186. MODH:L Synchronization when (PWMSYNC = 1)
write 1 to SWSYNC bit
software trigger event
write 1 to TRIG0 bit
SWSYNC bit
system clock
Synchronization).
trigger 0 event
system clock
MCF51JF128 Reference Manual, Rev. 2, 03/2011
TRIG0 bit
Hardware Trigger Was Used)
Preliminary
MODH:L registers
are updated if both bytes
were written
MODH:L registers
are updated if both bytes
were written
Chapter 37 FlexTimer (FTM)
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