mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1147

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Reset
44.3.6 SAI Transmit Configuration 5 Register (I2Sx_TCR5)
This register cannot be altered when the transmit enable bit is set.
Addresses: I2S0_TCR5 is FFFF_8200h base + 14h offset = FFFF_8214h
Freescale Semiconductor, Inc.
Bit
W
R
Reserved
Reserved
Reserved
31
0
31–29
28–24
23–21
20–16
15–13
WNW
W0W
12–8
Field
FSD
Field
FBT
30
0
0
0
29
0
28
0
Frame sync direction
Configures the direction of the frame sync.
0
1
This read-only bitfield is reserved and always has the value zero.
Word N width
Configures the number of bits in each word, for each word except the first in the frame. The value written
should be one less than the number of bits per word. This field must be configured greater than or equal
to Word 0 Width even when there is only one word in each frame. Words of fewer than 8 bits wide are not
supported.
This read-only bitfield is reserved and always has the value zero.
Word 0 width
Configures the number of bits in the first word in each frame. The value written should be one less than
the number of bits in the first word. Words of less than 8 bits wide are not supported if there is only one
word per frame.
This read-only bitfield is reserved and always has the value zero.
First bit shifted
Configures the bit index for the first bit transmitted for each word in the frame. If configured for MSB First,
the index of the next bit transmitted is one less than the current bit transmitted. If configured for LSB First,
the index of the next bit transmitted is one more than the current bit transmitted. The value written should
be greater than or equal to the word width when configured for MSB First. The value written should be
less than or equal to 31-word width when configured for LSB First.
27
0
WNW
Frame Sync is generated externally (slave mode).
Frame Sync is generated internally (master mode).
26
0
25
0
24
0
I2Sx_TCR4 field descriptions (continued)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
23
0
22
0
0
Chapter 44 Integrated Interchip Sound (I2S) / Synchronous Audio Interface (SAI)
I2Sx_TCR5 field descriptions
21
0
Table continues on the next page...
20
0
19
0
W0W
18
0
Preliminary
17
0
16
0
15
0
Description
Description
14
0
0
13
0
12
0
11
0
FBT
10
0
0
9
0
8
0
7
0
6
0
5
4
0
0
0
3
0
2
0
1
1147
0
0

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