mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 408

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Register Descriptions
18.5.3 Regulator Status and Control Register (PMC_REGSC)
The power management controller contains an internal voltage regulator. The voltage
regulator design uses a bandgap reference that is also available through a buffer as input
to certain internal peripherals, such as the CMP and ADC. The internal regulator provides
a status bit (REGONS) indicating the regulator is in run regulation.
408
LVWACK
Reserved
LVWIE
LVWV
LVWF
Field
4–2
1–0
7
6
5
This register is reset on Chip Reset not VLLS and by reset
types that trigger Chip Reset not VLLS. See the
for more information.
Low-Voltage Warning Flag
This read-only status bit indicates a low-voltage warning event. LVWF is set when V
below the trip point or after reset and V
0
1
Low-Voltage Warning Acknowledge
This write-only bit is used to acknowledge low voltage warning errors (write 1 to clear LVWF). Reads
always return 0.
Low-Voltage Warning Interrupt Enable
Enables hardware interrupt requests for LVWF.
0
1
This read-only bitfield is reserved and always has the value zero.
Low-Voltage Warning Voltage Select
Selects the LVW trip point voltage (V
LVDSC1[LVDV].
00
01
10
11
Low-voltage warning event not detected
Low-voltage warning event detected
Hardware interrupt disabled (use polling)
Request a hardware interrupt when LVWF = 1.
Low trip point selected (V LVW = V LVW1 )
Mid 1 trip point selected (V LVW = V LVW2 )
Mid 2 trip point selected (V LVW = V LVW3 )
High trip point selected (V LVW = V LVW4 )
MCF51JF128 Reference Manual, Rev. 2, 03/2011
PMC_LVDSC2 field descriptions
Preliminary
LVW
NOTE
Supply
). The actual voltage for the warning depends on
is already below V
Description
LVW
Reset
.
details
Freescale Semiconductor, Inc.
Supply
transitions