mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1065

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor, Inc.
UARTSWAI
LOOPS
RSRC
WAKE
Field
ILT
PE
M
7
6
5
4
3
2
1
Loop Mode Select
When LOOPS is set, the RxD pin is disconnected from the UART and the transmitter output is internally
connected to the receiver input.The transmitter and the receiver must be enabled to use the loop function.
0
1
UART Stops in Wait Mode
0
1
Receiver Source Select
This bit has no meaning or effect unless the LOOPS bit is set. When LOOPS is set, the RSRC bit
determines the source for the receiver shift register input.
0
1
9-bit or 8-bit Mode Select
This bit must be set when 7816E is set/enabled.
0
1
Receiver Wakeup Method Select
WAKE determines which condition wakes the UART: address mark in the most significant bit position of a
received data character or an idle condition on the receive pin input signal.
0
1
Idle Line Type Select
ILT determines when the receiver starts counting logic 1s as idle character bits. The counting begins
either after a valid start bit or after the stop bit. If the count begins after the start bit, then a string of logic
1s preceding the stop bit can cause false recognition of an idle character. Beginning the count after the
stop bit avoids false idle character recognition, but requires properly synchronized transmissions.
NOTE: In the case where UART is programmed with ILT = 1, a logic of 1'b0 is automatically shifted after
NOTE: In the case where UART is programmed for IDLE line wakeup (RWU = 1 and WAKE = 0), ILT
0
1
Parity Enable
Normal operation.
Loop mode where transmitter output is internally connected to receiver input. The receiver input is
determined by the RSRC bit.
UART clock continues to run in wait mode.
UART clock freezes while CPU is in wait mode.
Selects internal loop back mode and receiver input is internally connected to transmitter output.
Single-wire UART mode where the receiver input is connected to the transmit pin input signal.
Normal - start + 8 data bits (MSB/LSB first as determined by MSBF) + stop.
Use - start + 9 data bits (MSB/LSB first as determined by MSBF) + stop.
Idle-line wakeup.
Address-mark wakeup.
Idle character bit count starts after start bit.
Idle character bit count starts after stop bit.
a received stop bit thus resetting the idle count.
has no effect on when the receiver starts counting logic 1s as idle character bits. In idle line
wakeup an idle character is recognized at anytime the receiver sees 10, 11, or 12 1s depending
on the M, PE, and C4[M10] bits.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
UARTx_C1 field descriptions
Table continues on the next page...
Chapter 43 Universal Asynchronous Receiver/Transmitter (UART)
Preliminary
Description
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