mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 124

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Communication interfaces
3.10.1.1 USB Wakeup
When the USB controller detects no activity on the USB bus for more than 3 ms, the
INT_STAT[SLEEP] bit is set. This bit can cause an interrupt and software determines the
appropriate action.
Waking from a low power mode (except LLS and VLLSx modes) occurs through an
asynchronous interrupt triggered by activity on the USB bus. Setting the
USBTRC0[USBRESMEN] bit to 1 enables this function.
3.10.1.2 USB Power Distribution
This chip includes an internal 5 V to 3.3 V USB regulator that powers the USB
transceiver or the MCU (depending on the application).
The chip can be powered by two AA/AAA cells. In this case, the MCU is powered
through VDD, which is within the 1.8 V to 3.0 V range. After USB cable insertion is
detected, the USB regulator is enabled to power the USB transceiver.
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• Dual-role USB OTG-capable (On-The-Go) controller that supports a full-speed (FS)
• USB transceiver that includes internal 15 kΩ pulldowns on the D+ and D- lines for
• A 3.3 V regulator.
• USB device charger detection module.
• VBUS detect signal: To detect a valid VBUS in device mode, use a GPIO signal that
device or FS/LS host. The module complies with the USB 2.0 specification.
host mode functionality.
can wake the chip in all power modes.
USB voltage
MCF51JF128 Reference Manual, Rev. 2, 03/2011
regulator
Figure 3-33. USB Subsystem Overview
VREGIN
VOUT33
USB controller
Preliminary
transceiver
D+
FS/LS
D-
Device charger
detect
Freescale Semiconductor, Inc.