mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 685

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor, Inc.
Reserved
DMAEN
SMELB
Field
CFR
CFF
IER
IEF
7
6
5
4
3
2
1
This read-only bit is reserved and always has the value zero.
DMA Enable Control
The DMAEN bit enables the DMA transfer triggered from the CMP module. When this bit is set, a DMA
request is asserted when the CFR or CFF bit is set.
0
1
Stop Mode Edge/Level Interrupt Control
This bit controls whether the CFR and CFF bits are edge sensitive or level sensitive in Stop mode.
NOTE: This bit should always be programmed to 0 to keep the comparator working and to wake up the
0
1
Comparator Interrupt Enable Rising
The IER bit enables the CFR interrupt from the CMP. When this bit is set, an interrupt will be asserted
when the CFR bit is set.
0
1
Comparator Interrupt Enable Falling
The IEF bit enables the CFF interrupt from the CMP. When this bit is set, an interrupt will be asserted
when the CFF bit is set.
0
1
Analog Comparator Flag Rising
During normal operation, the CFR bit is set when a rising edge on COUT has been detected. The CFR bit
is cleared by writing a logic one to the bit. During Stop modes, CFR can be programmed as either edge or
level sensitive via the SMELB bit.
NOTE: Edge detection during Stop mode is only supported on platforms that allow peripherals to be
0
1
Analog Comparator Flag Falling
During normal operation, the CFF bit is set when a falling edge on COUT has been detected. The CFF bit
is cleared by writing a logic one to the bit. During Stop modes, CFF can be programmed as either edge or
level sensitive via the SMELB bit.
DMA disabled.
DMA enabled.
CFR/CFF are level sensitive in Stop mode. CFR will be asserted when COUT is high. CFF will be
asserted when COUT is low.
CFR/CFF are edge sensitive in Stop mode. An active low-to-high transition must be seen on COUT to
assert CFR, and an active high-to-low transition must be seen on COUT to assert CFF.
Interrupt disabled.
Interrupt enabled.
Interrupt disabled.
Interrupt enabled.
Rising edge on COUT has not been detected.
Rising edge on COUT has occurred.
MCU.
clocked during Stop modes. If the CFR flag is active during Stop mode, then SMELB must be set
to 0 for cases where it is not receiving a clock during Stop mode.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
CMPx_SCR field descriptions
Table continues on the next page...
Preliminary
Description
Chapter 30 Comparator (CMP)
685