mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1250

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Introduction
50.1.1 Overview
Debug support is divided into three areas:
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• Background debug mode (BDM)—Provides low-level debugging in the ColdFire
• Real-time debug support—Use of the full BDM command set requires the processor
processor core. In BDM, the processor core is halted and a variety of commands can
be sent to the processor to access memory, registers, and peripherals. The external
emulator uses a one-pin serial communication protocol. See
Mode
to be halted, which many real-time embedded applications cannot support. The core
includes a variety of internal breakpoint registers which can be configured to trigger
and generate a special interrupt. The resulting debug interrupt lets real-time systems
execute a unique service routine that can quickly save the contents of key registers
IPL_B[2:0]
RESET
BKGD
(BDM).
Figure 50-1. Simplified Version 1 ColdFire Core Block Diagram
Version 1 ColdFire Core (CF1Core)
IFP
OEP
BDC
CFxBDM
PST/DDATA
RTD
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Central Processing Unit
(CF1Cpu)
Debug
(CF1Dbg)
BDC
Instruction fetch pipeline
Operand execution pipeline
Background debug controller
ColdFire background debug module
Processor status/debug data
Real-time debug
BDM
CFx
Preliminary
OEP
DDATA
IFP
RTD
PST/
Background Debug
Freescale Semiconductor, Inc.
wdata
addr
rdata
attb