mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 619

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

27.4.4 RNG Interrupts
There is a single RNG interrupt generated to the processor's interrupt controller. The
source of the interrupt is determined by reading the RNG status register. If an error is the
cause of the interrupt, further information is available by reading the RNG error status
register. The interrupts can be masked by the RNG_CR[MASKDONE or MASKERR]
bits
It is strongly recommended that the error interrupt is only masked while debugging, since
masking the error interrupt could hide potentially fatal errors or conditions that could
result in corrupted results. All errors are considered fatal, requiring the RNG to be reset.
The RNG does not service any random data until a reset occurs.
The available interrupt sources are described in the following table.
27.5 Initialization/Application Information
This section describes the module initialization.
27.5.1 Manual Seeding
The intended general operation of the RNGB is as follows:
Freescale Semiconductor, Inc.
1. Reset/initialize.
2. Write to the RNG_CR to setup the RNGB for the desired functionality.
Seed generation done
Self test done
shift register (LFSR)
Linear feedback
FIFO Underflow
Sources
Statistical test
Error
Oscillator
Self test
RNG_ESR[LSFRE]
MCF51JF128 Reference Manual, Rev. 2, 03/2011
RNG_ESR[OSCE]
RNG_ESR[SATE]
RNG_ESR[FUFE]
RNG_SR[STDN]
RNG_ESR[STE]
Status Bit Field
RNG_SR[SDN]
RNG_SR[ERR]
Table 27-9. RNG Interrupt Sources
Preliminary
Mask Bit Field
MASKDONE
MASKDONE
MASKERR
MASKERR
MASKERR
MASKERR
MASKERR
MASKERR
RNG_CR
Chapter 27 Random Number Generator (RNGB)
First seed was generated
Self test finished
Error detected. See RNG_ESR for details.
Fault in one of the TRNG's LFSRs
TRNG ring oscillator may be
malfunctioning
Self test failed
Statistics test for last seed generation
failed
FIFO read while empty
Description
619