mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 720

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Register Definition
32.2.1 VREF Trim Register (VREF_TRM)
This register contains bits that contain the trim data for the Voltage Reference.
Address: VREF_TRM is FFFF_8670h base + 0h offset = FFFF_8670h
32.2.2 VREF Status and Control Register (VREF_SC)
This register contains the control bits used to enable the internal voltage reference and to
select the buffer mode to be used.
Address: VREF_SC is FFFF_8670h base + 1h offset = FFFF_8671h
720
Reserved
Reserved
TRIM
Reset
Field
Reset
Read
5–0
Read
Write
Write
7
6
Bit
Bit
VREFEN
This read-only bit is reserved and always has the value zero.
This read-only bit is reserved and always has the value zero.
Trim bits
These bits change the resulting VREF by approximately ± 0.5 mV for each step.
NOTE: Min = minimum and max = maximum voltage reference output. For minimum and maximum
000000
....
111111
7
0
0
7
0
voltage reference output values, refer to the Data Sheet for this chip.
Min
....
Max
REGEN
0
0
0
6
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
VREF_TRM field descriptions
0
0
0
5
5
Preliminary
0
0
0
4
4
Description
0
0
0
3
3
TRIM
VREFST
0
0
2
2
Freescale Semiconductor, Inc.
0
0
1
1
MODE_LV
0
0
0
0