mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 237

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

11.2.3 Supervisor/user stack pointers (A7 and OTHER_A7)
This ColdFire architecture supports two independent stack pointer (A7) registers: the
supervisor stack pointer (SSP) and the user stack pointer (USP). The hardware
implementation of these two program-visible 32-bit registers does not identify one as the
SSP and the other as the USP. Instead, the hardware uses one 32-bit register as the active
A7 and the other as OTHER_A7. Thus, the register contents are a function of the
processor operation mode, as shown in the following:
if SR[S] = 1
The BDM programming model supports direct reads and writes to A7 and OTHER_A7.
It is the responsibility of the external development system to determine, based on the
setting of SR[S], the mapping of A7 and OTHER_A7 to the two program-visible
definitions (SSP and USP).
To support dual stack pointers, the following two supervisor instructions are included in
the ColdFire instruction set architecture to load/store the USP:
The ColdFire Family Programmer’s Reference Manual describes these instructions. All
other instruction references to the stack pointer, explicit or implicit, access the active A7
register.
Freescale Semiconductor, Inc.
Reset
W
R
then
else
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The USP must be initialized using the
move.l Ay,USP
instruction before any entry into user mode.
The SSP is loaded during reset exception processing with the
contents of location 0x(00)00_0000.
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Table 11-3. Address registers (A0–A6) (continued)
–
A7 = Supervisor Stack Pointer
OTHER_A7 = User Stack Pointer
A7 = User Stack Pointer
OTHER_A7 = Supervisor Stack Pointer
MCF51JF128 Reference Manual, Rev. 2, 03/2011
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move.l Ay,USP;move to USP
move.l USP,Ax;move from USP
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Preliminary
NOTE
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Address
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Chapter 11 Core
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