mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 555

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

The address, write data, FB_TS/FB_ALE, FB_CSn, and all attribute signals change on
the rising edge of the Mini-FlexBus clock (FB_CLK). Read data is latched into the
device on the rising edge of the clock.
The Mini-FlexBus supports 8-bit, 16-bit, 32-bit, and 16-byte (line) operand transfers and
allows accesses to 8- and 16-bit data ports. Transfer parameters (address setup and hold,
port size, the number of wait states for the external device being accessed, automatic
internal transfer termination enable or disable) are programmed in the chip-select control
registers (CSCRs).
24.4.3 Data Byte Alignment and Physical Connections
The device aligns data transfers in Mini-FlexBus byte lanes with the number of lanes
depending on the data port width.
The following figure shows the byte lanes that external memory connects to and the
sequential transfers of a 32-bit transfer for the supported port sizes when byte lane shift is
disabled. For example, an 8-bit memory connects to the single lane FB_AD[7:0]. A 32-
bit transfer through this 8-bit port takes four transfers, starting with the MSB to the LSB.
Freescale Semiconductor, Inc.
Figure 24-10. Connections for External Memory Port Sizes (Non-Multiplexed Mode)
Figure 24-11. Connections for External Memory Port Sizes (Multiplexed Mode)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
16-Bit Port
8-Bit Port
Data Bus
External
Memory
Memory
Non-multiplexed Mode
Data Bus
8-Bit Port
External
Memory
Multiplexed Mode
Preliminary
FB_AD[15:8]
Driven with
address
values
Byte 0
Byte 2
FB_D[7:0]
Byte 0
Byte 1
Byte 2
Byte 3
FB_AD[7:0]
Byte 1
Byte 3
Byte 0
Byte 1
Byte 2
Byte 3
Chapter 24 External Bus Interface (Mini-FlexBus)
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