mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1109

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mcf51jf128

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mcf51jf128
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Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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43.4.2.6 Receiving break characters
The UART recognizes a break character when a start bit is followed by eight, nine, or ten
logic 0 data bits and a logic 0 where the stop bit should be. Receiving a break character
has these effects on UART registers:
The detection threshold for a break character can be adjusted when using an internal
oscillator in a LIN system by setting the S2[LBKDE] bit. The UART break character
detection threshold depends on the C1[M] and C1[PE] bits, the C4[LBKDE] bit, and the
C4[M10] bit. Refer to the following table.
While C4[LBKDE] is set, it will have these effects on the UART registers:
Break characters are not detected or supported when C7816[ISO_7816E] is set/enabled.
Freescale Semiconductor, Inc.
• Sets the framing error flag, S1[FE].
• Writes an all "0" dataword to the data buffer, which may cause S1[RDRF] to set
• May set the overrun flag, S1[OR], noise flag, S1[NF], parity error flag, S1[PE], or
• Prevents the S1[RDRF], S1[FE], S1[NF], and S1[PF] flags from being set. However,
• Sets the LIN break detect interrupt flag, S2[LBKDIF] if a LIN break character is
depending on the watermark and number of values in the data buffer.
the receiver active flag, S2[RAF].
if they are already set they will remain set.
received.
LBKDE
0
0
0
0
1
1
Table 43-100. Receive break character detection threshold
MCF51JF128 Reference Manual, Rev. 2, 03/2011
M
0
1
1
1
0
1
Chapter 43 Universal Asynchronous Receiver/Transmitter (UART)
Preliminary
M10
0
1
1
PE
0
1
Threshold (bits)
10
11
11
12
11
12
1109

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