mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1309

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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The examples show the WRITE_MEM.B{_WS}, WRITE_MEM.W{_WS}, and
WRITE_MEM.L{_WS} commands.
50.4.1.5.21 WRITE_Rn
If the processor is halted, this command writes the 32-bit operand to the selected CPU
general-purpose register (An, Dn). See
If the processor is not halted, this command is rejected as an illegal operation and no
operation is performed.
50.4.1.5.22 WRITE_XCSR_BYTE
Write the special status byte of XCSR (XCSR[31–24]). This command can be executed
in any mode.
50.4.1.5.23 WRITE_CSR2_BYTE
Write the most significant byte of CSR2 (CSR2[31–24]). This command can be executed
in any mode.
Freescale Semiconductor, Inc.
Write XCSR Status Byte
Write CSR2 Status Byte
Write general-purpose CPU register
host
host
target
target
0x0D
0x0E
0x40+CRN
host
target
MCF51JF128 Reference Manual, Rev. 2, 03/2011
XCSR Data
CSR2 Data
[31-24]
host
[31-24]
host
target
target
Rn data
host
[31-24]
target
Table 50-39
Preliminary
Rn data
host
[23-16]
target
for the CRN details when CRG is 01.
Rn data
host
target
[15-8]
Active Background
Rn data
host
target
[7-0]
Always Available
Always Available
D
L
Y
Chapter 50 Debug
1309

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