mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 839

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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The external clock passes through a synchronizer clocked by the system clock to assure
that counter transitions are properly aligned to system clock transitions.Therefore, to
meet Nyquist criteria considering also jitter, the frequency of the external clock source
must not exceed 1/4 of the system clock frequency.
37.4.2 Prescaler
The selected counter clock source passes through a prescaler that is a 7-bit counter. The
value of the prescaler is selected by the PS[2:0] bits. The following figure shows an
example of the prescaler counter and FTM counter.
37.4.3 Counter
The FTM has a 16-bit counter that is used by the channels either for input or output
modes. The FTM counter clock is the selected clock divided by the prescaler (Prescaler).
The FTM counter has these modes of operation:
37.4.3.1 Up Counting
Up counting is selected when (CPWMS = 0) and, if the quadrature decoder feature is
supported, when (QUADEN = 0).
Freescale Semiconductor, Inc.
• up counting (see
• up-down counting (see
• quadrature mode, if it is supported (see
selected input clock
EPWM
PS[2:0] = 001
CNTINH:L = 0x0000
MODH:L = 0x0003
prescaler counter
FTM counter
Figure 37-144. Example of the Prescaler Counter
Up
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Counting)
Up-Down
0
1
0
1
1
0
2
Counting)
1
Preliminary
0
3
Quadrature Decoder
1
0
0
1
0
1
1
0
2
1
0
3
1
Mode)
0
0
Chapter 37 FlexTimer (FTM)
1
0
1
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