mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 993
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mcf51jf128
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Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF51JF128.pdf
(1339 pages)
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40.3.1 USB Signal Descriptions
The following table shows a summary of module signals that interface with the device's
pins.
1. Voltage must be 3.3v +/- 10% for full functionality of the module. That is, the charger detection function does not work
Information about the signal integrity aspects of the lines including shielding, isolated
return paths, input or output impedance, packaging, suggested external components,
ESD, and other protections can be found in the USB 2.0 specification and in
Information.
40.4 Memory Map/Register Definition
This section describes the memory map and registers for the USBDCD module.
Freescale Semiconductor, Inc.
FFFF_8680
FFFF_8684
Absolute
address
when this voltage is below 3.0v, and the CONTROL[START] bit should not be set.
(hex)
avdd33
usb_dm
usb_dp
Signal
avss
dvss
dvdd
1
USBDCD_CONTROL
Clock Register (USBDCD_CLOCK)
The transceiver module also interfaces to usb_dm and usb_dp.
Both modules and the USB host/hub use these signal as bi-
directional, tri-state signals.
USB D- analog data signal. The analog block interfaces directly to the D-
signal on the USB bus.
USB D+ analog data signal. The analog block interfaces directly to the D+
signal on the USB bus.
3.3v regulated analog supply
Analog ground
Digital ground
1.2 V digital supply
Description
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Table 40-5. USB Signal Descriptions
Register name
Table continues on the next page...
USBDCD memory map
Preliminary
NOTE
Chapter 40 USB Device Charger Detection Module (USBDCD)
(in bits)
Width
32
32
Access
R/W
R/W
0000_00C1h
Reset value
0001_0000h
Application
I/O
I/O
I/O
I
I
I
I
Section/
40.4.1/
40.4.2/
page
994
996
993
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