mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1172

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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External Signal Description
45.1.3 Modes of Operation
The RGPIO module does not support any special modes of operation. As a memory-
mapped device located on the processor's high-speed local bus, it responds based strictly
on memory address and does not consider the operating mode (supervisor, user) of its
references.
45.2
45.2.1 Overview
As shown in
the device pin-muxing and pad logic. The following table shows a list of the associated
RGPIO input/output signals.
1172
RGPIO[15:0]
Signal Name
• Alternate addresses to perform data set, clear, and toggle functions using simple
• Separate read and write programming model views enable simplified driver
External Signal Description
writes
software
• Register for pin enables
• Register for controlling the pin data direction
• Register for storing output pin data
• Register for reading current pin state
• The two data registers (read, write) are mapped to a single program-visible
• Support for any access size (byte, word, or longword)
location
Figure
45-1, the RGPIO module's interface to external logic is indirect via
Table 45-1. RGPIO Module External I/O Signals
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Type
I/O
Preliminary
RGPIO Data Input/Output
Description
Freescale Semiconductor, Inc.

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