mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 840

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Functional Description
CNTINH:L defines the starting value of the count and MODH:L defines the final value
of the count (see the following figure). The value of CNTINH:L is loaded into the FTM
counter, and the counter increments until the value of MODH:L is reached, at which
point the counter is reloaded with the contents of CNTINH:L.
The FTM period when using up counting is (MODH:L – CNTINH:L + 0x0001) × period
of the FTM counter clock.
The TOF bit is set when the FTM counter changes from MODH:L to CNTINH:L.
If (CNTINH:L = 0x0000), the FTM counting is equivalent to TPM up counting (that is,
up and unsigned counting) (see the following figure). If (CNTINH[7] = 1), then the initial
value of the FTM counter is a negative number in two's complement, so the FTM
counting is up and signed. Conversely if (CNTINH[7] = 0 and CNTINH:L ≠ 0x0000),
then the initial value of the FTM counter is a positive number, so the FTM counting is up
and unsigned.
840
FTM counter (in decimal values)
FTM counting is up
CNTINH:L = 0xFFFC (in two's complement is equal to -4)
MODH:L = 0x0004
period of FTM counter clock
Figure 37-145. Example of FTM Up and Signed Counting
period of counting = (MODH:L - CNTINH:L + 0x0001) x period of FTM counter clock
TOF bit
MCF51JF128 Reference Manual, Rev. 2, 03/2011
set TOF bit
4
-4 -3 -2 -1
Preliminary
0
1
2
3
set TOF bit
4
-4 -3 -2 -1
0
1
2
Freescale Semiconductor, Inc.
3 4
set TOF bit
-4 -3

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