mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 922

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Register Definition
Two interrupt enable bits, TNEARIEN and RNFULLIEN, provide CPU interrupts based
on the "watermark" feature of the TNEARF and RNFULLF flags of the S register.
Addresses: SPI0_C3 is FFFF_81A0h base + 8h offset = FFFF_81A8h
922
RNFULLIEN
TNEAREF_
FIFOMODE
RNFULLF_
TNEARIEN
Reserved
INTCLR
MARK
MARK
Reset
Field
Read
7–6
Write
5
4
3
2
1
0
Bit
This read-only bitfield is reserved and always has the value zero.
Transmit FIFO nearly empty watermark
This bit selects the mark after which the TNEAREF flag is asserted.
0
1
Receive FIFO nearly full watermark
This bit selects the mark after which the RNFULLF flag is asserted.
0
1
Interrupt clearing mechanism select
This bit selects the mechanism by which the SPRF, SPTEF, TNEAREF, and RNFULLF interrupts are
cleared.
0
1
Transmit FIFO nearly empty interrupt enable
Writing 1 to this bit enables the SPI to interrupt the CPU when the TNEAREF flag is set. This bit is ignored
and has no function if the FIFOMODE bit is 0.
0
1
Receive FIFO nearly full interrupt enable
Writing 1 to this bit enables the SPI to interrupt the CPU when the RNEARFF flag is set. This bit is
ignored and has no function if the FIFOMODE bit is 0.
0
1
FIFO mode enable
7
0
TNEAREF is set when the transmit FIFO has 16 bits or less
TNEAREF is set when the transmit FIFO has 32 bits or less
RNFULLF is set when the receive FIFO has 48 bits or more
RNFULLF is set when the receive FIFO has 32 bits or more
These interrupts are cleared when the corresponding flags are cleared depending on the state of the
FIFOs
These interrupts are cleared by writing the corresponding bits in the CI register
No interrupt upon TNEAREF being set
Enable interrupts upon TNEAREF being set
No interrupt upon RNEARFF being set
Enable interrupts upon RNEARFF being set
0
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
TNEAREF_
SPI0_C3 field descriptions
Table continues on the next page...
MARK
0
5
Preliminary
RNFULLF_
MARK
0
4
Description
INTCLR
0
3
TNEARIEN
0
2
Freescale Semiconductor, Inc.
RNFULLIEN
0
1
FIFOMODE
0
0