mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1239

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Chapter 48 Touch Sense Input (TSI)
48.7.4 Touch detection unit
The touch detection unit is responsible to detect electrode capacitance changes. It also
detects the occurrence of error with the electrode in case the capacitance result is 0x0000
or 0xFFFF. The errors can be caused by the electrode pin shorted to V
or V
or by
DD
SS
electrode capacitances out of the configuration range of the TSI module.
48.7.4.1 Capacitance change threshold
Each TSI pin has its result register TSICHnCNT. At the end of each electrode conversion
the touch detection unit compares if the TSICHnCNT result value is inside a configurable
range. The comparison range is defined individually for each TSI pin by the following
registers, TSICHnHTH, the upper threshold value and TSICHnLTH, the lower threshold
value. If the TSICHnCNT happens to be out of the range defined by TSICHnLTH and
TSICHnHTH the GENCS[OUTRGF] flag is set. Also the corresponding bit
STATUS[ORNGFx] is set indicating which electrode pins happened to have their result
register out-of- range.
To clear the GENCS[OUTRGF] write 1 to it.
48.7.4.1.1 Out-of-range interrupt
The GENCS[OUTRGF] flag generates a TSI interrupt request if the GENCS[TSIIE] bit
is set and GENCS[ESOR] bit is cleared. With this configuration, after the end-of-
electrode scan, the TSI interrupt is only requested if there is a capacitance change. The
capacitance change is detected when the result register gets outside the window defined
by the TSI_THRESHLD register. If the electrodes capacitance does not vary, the TSI
Interrupt do not interrupt the CPU.
48.7.4.2 Error interrupt
The GENCS[EXTERF] is set in the case the capacitance result registers, TSICHnCNT, of
a TSI pin is either 0 or 0xFFFF, the two possible extreme values. The EXTERF flag
generates a TSI Error Interrupt request if the GENCS[ERIE] bit is set.
When the GENCS[EXTERF] is set, the registers STATUS register indicates which TSI
pins have the error condition by setting the correspondent STATUS[ERRORx] bit.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Freescale Semiconductor, Inc.
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