mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 875

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mcf51jf128

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mcf51jf128
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Mcf51jf128 Reference Manual
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Freescale Semiconductor, Inc
Datasheet

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37.4.12.1 Deadtime Insertion Corner Cases
If (PS[2:0] bits are cleared), (DTPS[1:0] = 0:0 or DTPS[1:0] = 0:1):
Although, in most cases the deadtime delay is not comparable to channels (n) and (n+1)
duty cycle, the following figures show examples where the deadtime delay is comparable
to the duty cycle.
Freescale Semiconductor, Inc.
Figure 37-196. Example of the Deadtime Insertion (ELSnB:ELSnA = 1:0, POL(n) = 0, and
channel (n+1) output
channel (n+1) output
channel (n) output
POL(n+1) = 0) when the Deadtime Delay Is Comparable To Channel (n+1) Duty Cycle
• and the deadtime delay is greater than or equal to the channel (n) duty cycle ((C(n
• and the deadtime delay is greater than or equal to the channel (n+1) duty cycle
channel (n+1) match
channel (n) output
(before deadtime
(after deadtime
(before deadtime
(after deadtime
channel (n) match
FTM counter
insertion)
+1)VH:L – C(n)VH:L) × system clock), then the channel (n) output is always the
inactive value (POL(n) bit value).
((MODH:L – CNTINH:L + 1 – (C(n+1)VH:L – C(n)VH:L) ) × system clock), then
the channel (n+1) output is always the inactive value (POL(n+1) bit value).
insertion)
insertion)
insertion)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Chapter 37 FlexTimer (FTM)
875

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