mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 641

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

29.3.3 Configuration register 2 (ADCx_CFG2)
CFG2 register selects the special high speed configuration for very high speed
conversions and selects the long sample time duration during long sample mode.
Addresses: ADC0_CFG2 is FFFF_8600h base + Ch offset = FFFF_860Ch
Freescale Semiconductor, Inc.
Reset
Reset
ADACKEN
Bit
Bit
W
W
Reserved
Reserved
MUXSEL
R
R
ADHSC
31–8
Field
7–5
4
3
2
31
15
0
0
30
14
0
0
This read-only bitfield is reserved and always has the value zero.
This read-only bitfield is reserved and always has the value zero.
ADC Mux select
ADC Mux select bit is used to change the ADC mux setting to select between alternate sets of ADC
channels.
0
1
Asynchronous clock output enable
ADACKEN enables the ADC's asynchronous clock source and the clock source output regardless of the
conversion and input clock select (ADICLK bits) status of the ADC. Based on MCU configuration, the
asynchronous clock may be used by other modules (see Chip Configuration information). Setting this bit
allows the clock to be used even while the ADC is idle or operating from a different clock source. Also,
latency of initiating a single or first-continuous conversion with the asynchronous clock selected is
reduced since the ADACK clock is already operational.
0
1
High speed configuration
ADxxa channels are selected.
ADxxb channels are selected.
Asynchronous clock output disabled; Asynchronous clock only enabled if selected by ADICLK and a
conversion is active.
Asynchronous clock and clock output enabled regardless of the state of the ADC.
29
13
0
0
28
12
0
0
MCF51JF128 Reference Manual, Rev. 2, 03/2011
0
27
11
0
0
ADCx_CFG2 field descriptions
Table continues on the next page...
26
10
0
0
25
0
0
9
Preliminary
24
0
0
8
0
Description
23
0
0
7
22
0
0
0
Chapter 29 Analog-to-Digital Converter (ADC)
6
21
0
0
5
20
0
0
4
19
0
0
3
18
0
0
2
17
0
ADLSTS
0
1
16
0
0
0
641