mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 734

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

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Memory Map and Register Definition
33.3.3 Counter Register (PDBx_CNT)
Addresses: PDB0_CNT is FFFF_8540h base + 8h offset = FFFF_8548h
33.3.4 Interrupt Delay Register (PDBx_IDLY)
Addresses: PDB0_IDLY is FFFF_8540h base + Ch offset = FFFF_854Ch
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Bit
Bit
W
W
R
R
Reserved
Reserved
Reserved
31
31
0
0
31–16
31–16
31–16
MOD
15–0
15–0
Field
Field
CNT
Field
30
30
0
0
29
29
0
0
28
28
0
0
This read-only bitfield is reserved and always has the value zero.
PDB Modulus.
These bits specify the period of the counter. When the counter reaches this value, it will be reset back to
zero. If the PDB is in Continuous mode, the count begins anew. Reading these bits returns the value of
internal register that is effective for the current cycle of PDB.
This read-only bitfield is reserved and always has the value zero.
PDB Counter
These read-only bits contain the current value of the counter.
This read-only bitfield is reserved and always has the value zero.
27
27
0
0
26
26
0
0
25
25
0
0
24
24
0
0
0
0
MCF51JF128 Reference Manual, Rev. 2, 03/2011
23
23
0
0
22
22
0
0
PDBx_MOD field descriptions
PDBx_IDLY field descriptions
PDBx_CNT field descriptions
21
21
0
0
Table continues on the next page...
20
20
0
0
19
19
0
0
18
18
0
0
Preliminary
17
17
0
0
16
16
0
0
15
15
0
1
Description
Description
Description
14
14
0
1
13
13
0
1
12
12
0
1
11
11
0
1
10
10
0
1
0
1
9
9
0
IDLY
1
8
CNT
8
Freescale Semiconductor, Inc.
0
1
7
7
0
1
6
6
0
1
5
5
4
0
4
1
0
1
3
3
0
1
2
2
0
1
1
1
0
1
0
0