mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 247

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

All ColdFire processors support a 1024-byte vector table aligned on any 1 MB address
boundary (see
vector table are based at 0x(00)00_0000 in the flash or 0x(00)80_0000 in the internal
SRAM.
The table contains 256 exception vectors; the first 64 are defined for the core and the
remaining 192 are device-specific peripheral interrupt vectors. See the interrupt chapter
for details on the device-specific interrupt sources.
For the V1 ColdFire core, the table is partially populated with the first 64 reserved for
internal processor exceptions, while vectors 64-102 are reserved for the peripheral I/O
requests and the seven software interrupts. Vectors 103–255 are unused and reserved.
Freescale Semiconductor, Inc.
desired handler. After the instruction fetch for the first opcode of the handler has
initiated, exception processing terminates and normal instruction processing
continues in the handler.
Number(s)
Vector
15–23
25–31
32–47
48–60
6–7
10
11
12
13
14
24
0
1
2
3
4
5
8
9
Table
11-14). For the V1 ColdFire core, the only practical locations for the
Table 11-14. Exception Vector Assignments
0x03C–0x05C
0x080–0x0BC
0x0C0–0x0F0
0x018–0x01C
0x064–0x07C
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Offset (Hex)
Vector
0x00C
0x02C
0x000
0x004
0x008
0x010
0x014
0x020
0x024
0x028
0x030
0x034
0x038
0x060
Table continues on the next page...
Preliminary
Stacked Program
Counter
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Next
Next
Next
Next
—
—
—
—
—
—
—
1
Unimplemented line-A opcode
Unimplemented line-F opcode
Initial supervisor stack pointer
Trap # 0-15 instructions
Initial program counter
Spurious interrupt
Privilege violation
Illegal instruction
Debug interrupt
Divide by zero
Address error
Access error
Assignment
Format error
Reserved
Reserved
Reserved
Reserved
Reserved
Trace
Chapter 11 Core
247