mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 859

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

37.4.8.1 Asymmetrical PWM
In the combine mode, the control of the PWM signal first edge (when the channel (n)
match occurs, that is, FTM counter = C(n)VH:L) is independent of the control of the
PWM signal second edge (when the channel (n+1) match occurs, that is, FTM counter =
C(n+1)VH:L). So, the combine mode allows to generate asymmetrical PWM signals.
37.4.9 Complementary Mode
The complementary mode is selected when all of the following apply:
In complementary mode the channel (n+1) output is the inverse of the channel (n) output.
The channel (n+1) output is the same as the channel (n) output if all of the following
apply:
Freescale Semiconductor, Inc.
• (FTMEN = 1)
• (QUADEN = 0) if the quadrature decoder feature is supported
• (DECAPEN = 0)
• (COMBINE = 1)
• (CPWMS = 0)
• (COMP = 1)
• (FTMEN = 1)
• (QUADEN = 0) if the quadrature decoder feature is supported
• (DECAPEN = 0)
• (COMBINE = 1)
Figure 37-177. Channel (n) Output If (C(n+1)V > MOD) and (CNTIN < C(n)V = MOD)
with ELSnB:ELSnA = X:1
with ELSnB:ELSnA = 1:0
channel (n) output
channel (n) output
C(n)VH:L
MODH:L =
C(n+1)VH:L
CNTINH:L
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
not fully 100% duty cycle
not fully 0% duty cycle
FTM counter
Chapter 37 FlexTimer (FTM)
859