mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 827

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

37.3.19 Deadtime Insertion Control (FTMx_DEADTIME)
This register selects the deadtime prescaler factor and deadtime value. All FTM channels
use this clock prescaler and this deadtime value for the deadtime insertion.
Addresses: FTM0_DEADTIME is FFFF_8440h base + 28h offset = FFFF_8468h
37.3.20 External Trigger (FTMx_EXTTRIG)
This register indicates when a channel trigger was generated, enables the generation of a
trigger when the FTM counter is equal to its initial value, and selects which channels are
used in the generation of the channel triggers. Several FTM channels can be selected to
generate multiple triggers in one PWM period.
Channels 6 and 7 are not used to generate channel triggers.
Freescale Semiconductor, Inc.
DTVAL
DTPS
Reset
Field
Read
7–6
5–0
Write
Bit
FTM1_DEADTIME is FFFF_8480h base + 28h offset = FFFF_84A8h
Deadtime Prescaler Value
Selects the division factor of the system clock. This prescaled clock is used by the deadtime counter.
DTPS is write protected. It can be written only when MODE[WPDIS] = 1.
0x
10
11
Deadtime Value
Selects the deadtime insertion value for the deadtime counter. The deadtime counter is clocked by a
scaled version of the system clock. See the description of DTPS.
Deadtime insert value = (DTPS × DPVAT).
DTVAL selects the number of deadtime counts inserted as follows:
When DTVAL is 0, no counts are inserted.
When DTVAL is 1, 1 count is inserted.
When DTVAL is 2, 2 counts are inserted.
This pattern continues up to a possible 63 counts.
DTVAL is write protected. It can be written only when MODE[WPDIS] = 1.
7
0
Divide the system clock by 1.
Divide the system clock by 4.
Divide the system clock by 16.
DTPS
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
FTMx_DEADTIME field descriptions
0
5
Preliminary
0
4
Description
0
3
DTVAL
0
2
Chapter 37 FlexTimer (FTM)
0
1
0
0
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