mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1165

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Chapter 44 Integrated Interchip Sound (I2S) / Synchronous Audio Interface (SAI)
Examples of supported data alignment and the required First Bit Shifted configuration are
illustrated in
Figure 44-42
for LSB First configurations and
Figure 44-43
for MSB First
configurations.
Figure 44-42. SAI First Bit Shifted, LSB First
Figure 44-43. SAI First Bit Shifted, MSB First
44.4.5.2 FIFO pointers
When writing to the Transmit Data Register (TDR), the write FIFO pointer increments
after each valid write. The SAI supports 8-bit and 16-bit writes to TDR for transmitting
8-bit and 16-bit data respectively.
Writes to the Transmit Data Register are ignored if the corresponding Transmit Channel
Enable is clear or if the FIFO is full. If the Transmit FIFO is empty, the Transmit Data
Register must be written at least three bit clocks before the start of the next unmasked
word to avoid a FIFO underrun.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Freescale Semiconductor, Inc.
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