MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 16

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Table of Contents
Paragraph
Number
7.8.5.2
7.8.5.3
7.8.5.4
7.8.5.5
7.8.5.6
7.8.5.6.1
7.8.5.6.2
7.8.5.6.3
7.8.5.6.4
7.8.6
7.8.6.1
7.8.6.2
7.8.7
7.8.7.1
7.8.7.2
7.8.7.2.1
7.8.7.2.2
7.8.8
7.8.9
7.9
7.9.1
7.9.2
7.9.3
7.10
7.10.1
7.10.2
7.10.3
7.10.4
7.10.5
7.10.6
7.10.7
7.10.7.1
7.10.7.2
7.10.7.3
7.10.7.4
7.10.7.5
7.10.7.6
7.10.8
7.10.8.1
7.10.8.2
7.10.8.3
7.10.9
7.10.10
7.10.11
7.10.11.1
xii
SI Mode Register (SIMODE)..................................................................7-78
SI Clock Route Register (SICR).............................................................7-86
SI Command Register (SICMR).............................................................7-87
SI Status Register (SISTR) ....................................................................7-87
SI RAM Pointers (SIRP).........................................................................7-88
SIRP When RDM = 00 (One Static TDM) ..............................................7-89
SIRP When RDM = 01 (One Dynamic TDM) .........................................7-89
SIRP When RDM = 10 (Two Static TDMs) ............................................7-90
SIRP When RDM = 11 (Two Dynamic TDMs) .......................................7-90
IDL Interface Example ...........................................................................7-91
IDL Interface Programming....................................................................7-95
SI GCI Activation/Deactivation Procedure .............................................7-98
SI GCI Programming..............................................................................7-98
Normal Mode GCI Programming ...........................................................7-98
SCIT Programming ................................................................................7-98
Serial Interface Synchronization ..........................................................7-100
NMSI Configuration..............................................................................7-100
Baud Rate Generators (BRGs) ............................................................7-103
Serial Communication Controllers (SCCs)...........................................7-109
SCC Overview .....................................................................................7-110
BD Table Pointer (RBASE, TBASE) ....................................................7-125
SCC Function Code Registers (RFCR, TFCR)....................................7-125
Maximum Receive Buffer Length Register (MRBLR) ..........................7-127
Receiver BD Pointer (RBPTR).............................................................7-127
Transmitter BD Pointer (TBPTR) .........................................................7-127
Other General Parameters...................................................................7-128
SCC Event Register (SCCE) ...............................................................7-128
SCC Mask Register (SCCM) ...............................................................7-129
SCC Status Register (SCCS) ..............................................................7-129
SCC Interrupt Handling........................................................................7-130
SCC Timing Control .............................................................................7-130
Synchronous Protocols ........................................................................7-130
SI IDL Interface Support .......................................................................7-90
SI GCI Support......................................................................................7-96
Autobaud Support ...............................................................................7-105
BRG Configuration Register (BRGC)..................................................7-106
UART Baud Rate Examples ...............................................................7-108
General SCC Mode Register (GSMR) ................................................7-111
SCC Protocol-Specific Mode Register (PSMR) ..................................7-120
SCC Data Synchronization Register (DSR)........................................7-121
SCC Transmit on Demand Register (TODR)......................................7-121
SCC Buffer Descriptors.......................................................................7-122
SCC Parameter RAM..........................................................................7-124
Interrupts from the SCCs ....................................................................7-128
SCC Initialization.................................................................................7-129
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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