MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 410

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Serial Interface with Time Slot Assigner
7.8.5.3 SI CLOCK ROUTE REGISTER (SICR). The 32-bit SICR is used to define the SCC
clock sources. The clock source can be one of the four baud rate generators or an input from
a bank of clock pins. The SICR appears to the user as a memory-mapped, read-write reg-
ister and is cleared at reset.
GRx—Grant Support of SCCx
SCx—SCCx Connection
RxCS—Receive Clock Source for SCCx
These bits are ignored when the SCCx is connected to the TSA (SCx = 1).
TxCS—Transmit Clock Source for SCCx
7-86
GR4
GR2
31
15
These bits are ignored when SCCx is connected to the TSA (SCx = 1).
0 = SCCx transmitter does not support the grant mechanism. The grant is always as-
1 = SCCx transmitter supports the grant mechanism as determined by the GMx bit of
0 = SCCx is not connected to the multiplexed SI but is either connected directly to the
1 = SCCx is connected to the multiplexed SI. The NMSIx receive pins are available for
000 = SCCx receive clock is BRG1.
001 = SCCx receive clock is BRG2.
010 = SCCx receive clock is BRG3.
011 = SCCx receive clock is BRG4.
100 = SCCx receive clock for x = 1,2 is CLK1 and for x = 3,4 is CLK5.
101 = SCCx receive clock for x = 1,2 is CLK2 and for x = 3,4 is CLK6.
110 = SCCx receive clock for x = 1,2 is CLK3 and for x = 3,4 is CLK7.
111 = SCCx receive clock for x = 1,2 is CLK4 and for x = 3,4 is CLK8.
000 = SCCx transmit clock is BRG1.
001 = SCCx transmit clock is BRG2.
010 = SCCx transmit clock is BRG3.
011 = SCCx transmit clock is BRG4.
100 = SCCx transmit clock for x = 1,2 is CLK1 and for x = 3,4 is CLK5.
101 = SCCx transmit clock for x = 1,2 is CLK2 and for x = 3,4 is CLK6.
110 = SCCx transmit clock for x = 1,2 is CLK3 and for x = 3,4 is CLK7.
111 = SCCx transmit clock for x = 1,2 is CLK4 and for x = 3,4 is CLK8.
SC4
SC2
30
14
serted internally.
its channel.
NMSIx pins or is not used. The choice of general-purpose I/O port pins versus
SCCn pins is made in the parallel I/O control register.
other purposes.
29
13
R4CS
R2CS
28
12
27
11
Freescale Semiconductor, Inc.
For More Information On This Product,
26
10
MC68360 USER’S MANUAL
Go to: www.freescale.com
T4CS
T2CS
25
9
24
8
GR3
GR1
23
7
SC3
SC1
22
6
21
5
R3CS
R1CS
20
4
19
3
18
2
T3CS
T1CS
17
1
16
0