MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 939

IC MPU QUICC 25MHZ 240-FQFP

MC68EN360CAI25L

Manufacturer Part Number
MC68EN360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Series
MC68000r

Specifications of MC68EN360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Core Size
32 Bit
Cpu Speed
25MHz
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
No. Of Pins
240
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Family Name
M68xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EN360CAI25L
Manufacturer:
APLHA
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12 000
Part Number:
MC68EN360CAI25L
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EN360CAI25L
Manufacturer:
FREESCALE
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.
D.2.7 Performance
The QUICC32 with the QMC protocol is designed to handle data rates from 8 kbps to 2.048
Mbps.
The QMC can support up to 32 channels.
These are the outer boundaries. The user is free to program channel routing in the QMC and
the SI RAM to create any other TDM system.
Beside the support for QMC, the remaining SCC channels in the QUICC32 can, in the 25
MHz version, support a data rate of 64 kbps each with any protocol framework. These
remaining channels can be used independently or also multiplexed through the SI RAM.
The 33 MHz version of QUICC32 can support one Ethernet channel with 32 QMC channels.
A more detailed performance table will be provided at a later date.
CHANNEL j PARAMETER
PARAMETER
RAM PAGE 1
PARAMETER
RAM PAGE 2
PARAMETER
RAM PAGE 3
PARAMETER
RAM PAGE 4
CHANNEL 0 PARAMETER
CHANNEL 1 PARAMETER
Freescale Semiconductor, Inc.
For More Information On This Product,
MCBASE
TBASE
RBASE
Figure D-6. FQMC Memory Map
DPR
MC68360 USER’S MANUAL
Go to: www.freescale.com
MEMORY STRUCTURE FOR MULTICHANNEL CONTROLLER
EXTERNAL MEMORY
CHANNEL j Tx BD
CHANNEL j Rx BD
TABLE
TABLE
MC68MH360 Product Brief
64K

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