MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 603

IC MPU QUICC 25MHZ 240-FQFP

MC68EN360CAI25L

Manufacturer Part Number
MC68EN360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Series
MC68000r

Specifications of MC68EN360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Core Size
32 Bit
Cpu Speed
25MHz
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
No. Of Pins
240
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Family Name
M68xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Freescale Semiconductor, Inc.
Serial Management Controllers (SMCs)
7.11.7.5 SMC UART RECEPTION PROCESSING. When the CPU32+ core enables the
SMC receiver in UART mode, it will enter hunt mode, waiting for the first character to arrive.
Once the first character arrives, the first Rx BD is checked by the CP to see if it is empty. It
then begins storing characters in the associated data buffer.
When the data buffer has been filled or the MAX_IDL timer has expired (assuming it was
enabled), the SMC clears the E-bit in the BD and generates an interrupt if the I-bit in the BD
is set. If the incoming data exceeds the length of the data buffer, the SMC will fetch the next
BD in the table and, if it is empty, will continue to transfer data to this BD’s associated data
buffer.
If the CM bit is set in the Rx BD, the E-bit will not be cleared, allowing the associated data
buffer to be overwritten automatically when the CP next accesses this data buffer.
7.11.7.6 SMC UART PROGRAMMING MODEL. An SMC configured as a UART uses the
same data structure as in the other modes. The SMC UART data structure supports multi-
buffer operation. The SMC UART allows the user to transmit break and preamble
sequences. Overrun, parity, and framing errors are reported via the BDs. In its simplest
form, the SMC UART can function in a character-oriented environment. Each character is
transmitted with accompanying stop bits and parity (as configured by the user), and received
into separate 1-byte buffers. Reception of each buffer may generate a maskable interrupt.
Many applications may want to take advantage of the message-oriented capabilities sup-
ported by the SMC UART by using linked buffers (in either receive or transmit). In this case,
data is handled in a message-oriented environment; users can work on entire messages
rather than operating on a character-by-character basis. A message may span several
linked buffers. Each message can be both transmitted and received as a linked list of buffers
without any intervention from the CPU32+, which achieves both ease in programming and
significant savings in processor overhead.
In the message-oriented environment, the idle sequence is used as the message delimiter.
The transmitter is able to generate an idle sequence before starting a new message, and
the receiver is able to close a buffer upon detection of idle sequence.
7.11.7.7 SMC UART COMMAND SET. The following transmit and receive commands are
issued to the CR.
7.11.7.7.1 Transmit Commands. The following paragraphs describe the SMC UART
transmit commands.
STOP TRANSMIT Command . The channel STOP TRANSMIT command disables the
transmission of characters on the transmit channel. If this command is received by the SMC
UART controller during message transmission, transmission of that message is aborted.
The SMC UART completes transmission of any data already transferred to its FIFO and shift
register (up to two characters) and then stops transmitting data. The TBPTR is not advanced
when this command is issued.
The SMC UART transmitter will transmit a programmable number of break sequences and
then start to transmit idles. The number of break sequences (which may be zero) should be
MC68360 USER’S MANUAL
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