MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 240

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

CPU32+
5.7.2.11 CONDITIONAL BRANCH INSTRUCTIONS. The conditional branch instruction
timing table indicates the number of clock periods needed for the processor to perform the
specified branch on the given branch size, with complete execution times given. No addi-
tional tables are needed to calculate total effective execution time for these instructions. The
total number of clock cycles is outside the parentheses. The numbers inside parentheses (r/
p/w) are included in the total clock cycle number. All timing data assumes two-clock reads
and writes.
5-98
BCHG
BCHG
BCHG
BCHG
BCLR
BCLR
BCLR
BCLR
BSET
BSET
BSET
BSET
BTST
BTST
BTST
BTST
Timing is calculated with the CPU32+ in 16-bit mode.
Bcc
Bcc.B
Bcc.W
Bcc.L
DBcc
DBcc
DBcc
DBcc
DBcc
DBcc
Timing is calculated with the CPU32+ in 16-bit mode.
An # fetch EA time must be added for this instruction: FEA
In loop mode
#, Dn
Dn, Dm
#, FEA
Dn, FEA
#, Dn
Dn, Dm
#, FEA
Dn, FEA
#, Dn
Dn, Dm
#, FEA
Dn, FEA
#, Dn
Dn, Dm
#, FEA
Dn, FEA
(taken)
(not taken)
(not taken)
(not taken)
(T, not taken)
(F, 1, not taken)
(F, not 1, taken)
(T, not taken)
(F, 1, not taken)
(F, not 1, taken)
Instruction
Instruction
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
Head
Head
2
4
1
2
2
4
1
2
2
4
1
2
2
2
1
2
2
2
0
0
1
2
6
4
6
6
Tail
Tail
0
0
2
2
0
0
2
2
0
0
2
2
0
0
0
0
0
0
0
1
0
0
0
0
2
2
FEA
OPER
10(0/0/0)
10(0/2/0)
6(0/2/0)
8(0/2/1)
6(0/2/0)
8(0/2/1)
6(0/2/0)
8(0/2/1)
4(0/2/0)
4(0/2/0)
6(0/1/0)
8(0/1/0)
6(0/1/0)
8(0/1/1)
6(0/1/0)
8(0/1/1)
6(0/1/0)
8(0/1/1)
4(0/1/0)
8(0/1/0)
8(0/2/0)
4(0/1/0)
4(0/2/0)
6(0/3/1)
4(0/2/0)
6(0/2/0)
Cycles
Cycles