MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 299

IC MPU QUICC 25MHZ 240-FQFP

MC68EN360CAI25L

Manufacturer Part Number
MC68EN360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Series
MC68000r

Specifications of MC68EN360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Core Size
32 Bit
Cpu Speed
25MHz
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
No. Of Pins
240
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Family Name
M68xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Part Number
Manufacturer
Quantity
Price
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Part Number:
MC68EN360CAI25L
Manufacturer:
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Quantity:
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Part Number:
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slower than the QUICC's internal bus masters. The external master may be either synchro-
nous or asynchronous with respect to the QUICC system clock, with the exception of the
MC68EC040, which must always be synchronous with respect to the QUICC system clock.
Thus, if a 25-MHz QUICC is used, a 25-MHz MC68EC040 should also be used.
If an external MC68040 master does not use the memory controller at all, then the QUICC
can operate asynchronously to the MC68040, but the QUICC MC68040 companion mode
signals cannot be used, and the MC68040 bus signals must be converted to MC68030-type
bus signals before the MC68040 accesses the QUICC's internal RAM and peripherals.
Figure 6-12. Larger QUICC System Configuration
MC68360
QUICC
PRTY3–PRTY0
CAS3–CAS0
WE3–WE0
ADDRESS
Freescale Semiconductor, Inc.
For More Information On This Product,
DATA
RAS2
RAS1
WE0
CS0
CS7
OE
R/W
MC68360 USER’S MANUAL
Go to: www.freescale.com
BUFFER
CE (ENABLE)
OE (OUTPUT ENABLE)
WE (WRITE)
DATA
ADDRESS
8-, 16-, OR 32-BIT SRAM
E (ENABLE)
G (OUTPUT ENABLE)
W (WRITE)
DATA
ADDRESS
(FLASH OR REGULAR)
RAS
CAS3–CAS0
W (WRITE)
DATA
ADDRESS
PARITY
System Integration Module (SIM60)
8-BIT BOOT
EPROM
RAS
(OPTIONAL PARITY)
TWO-DRAM SIMMs
16- OR 32-BIT

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