MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 943

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Burst 6-72, 6-77, 6-78
Burst Access Support 6-61
Burst EPROM 9-38
Burst Length 6-76
Burst SRAM 9-41
Bus
Bus Arbitration 4-49, 4-55, 9-35
Bus Clear 6-25
Bus Control Signals 2-7
Bus Controller 5-83
Bus Error 4-5, 4-43
Bus Error Exception 5-40
Address Bus 2-1
Arbitration Synchronous Timing Mode 6-
Asynchronous 4-20
Autovector 4-38
Breakpoint 4-31
Bus Error 4-5, 4-43
Bus Exception 4-41
Byte Port 4-12
Data Bus 2-5
Double Bus Fault 4-48
Double Bus Fault Monitor 6-9
Dynamic Bus Sizing 4-6, 4-19
Fast Termination 4-21
Halt Termination 4-41
IMB 1-4, 10
Intermodule Bus 1-4, 10
Internal Accesses 4-59
Interrupt Acknowledge 4-36
LPSTOP 4-35
Misaligned Operands 4-11
Normal Termination 4-41
Port Sizes 4-8
Read Cycle 4-23
Read-Modify-Write 4-28
Retry 4-44
Retry Termination 4-41
Show Cycles 4-62
Spurious Interrupt 4-41
State Diagram 4-55
Synchronous 4-21
System Bus 2-1, 4-1
Wait States 4-26, 4-28
Word Port 4-9, 4-14
Write Cycle 4-26
31
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Bus Exceptions 4-41, 4-59, 7-51
Bus Monitor 6-4, 6-8
Bus Operation 4-1
Bus Signal 2-1
Busy Signal 7-335
Byte Port 4-12
C/I Channel 7-307
C/I Channel Receive Buffer Descriptor 7-
C/I Channel Transmit Buffer Descriptor 7-
Cache Modes on the MC68Ec040 9-51
Caching 9-36
Calculate Effective Address Timing Table 5-
CALL 5-70
CALL Command 5-63
CAM Interface 7-243
Carrier Sense 7-116
CAS 2-7, 2-13, 6-48, 6-60, 6-63, 6-67
Cascaded Mode 7-19
CCITT I.460 7-97
CD 7-63, 7-101, 7-114, 7-118, 7-128, 7-129,
CDVCR 6-12, 6-42
Centronics 1-13, 7-331, 7-336
CEPT 1-15, 14
Change of Flow 5-84, 5-85
Changing Privilege Level 5-35
Character Length 7-282, 7-298
Chip Driver Module B-2
Chip Selects 9-24
CICR 7-378
CIMR 7-381
CIPR 7-380
CISR 7-381
CLK 2-10, 2-13, 7-86, 7-101
CLK2 7-104
CLK6 7-104
CLKO 2-10
CLKO Power Pins 6-19
CLKO1 6-18
CLKO2 6-18
CLKOCR 6-12, 6-39
310
311
91
7-130, 7-187, 7-199, 7-219, 7-223, 7-
229, 7-233, 7-240, 7-266, 7-358
C
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