MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 332

IC MPU QUICC 25MHZ 240-FQFP

MC68EN360CAI25L

Manufacturer Part Number
MC68EN360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Series
MC68000r

Specifications of MC68EN360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Core Size
32 Bit
Cpu Speed
25MHz
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
No. Of Pins
240
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Family Name
M68xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

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Part Number:
MC68EN360CAI25L
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Part Number:
MC68EN360CAI25L
Manufacturer:
Freescale Semiconductor
Quantity:
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Part Number:
MC68EN360CAI25L
Manufacturer:
FREESCALE
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20 000
Dual-Port RAM
7.2.1 Command Register Examples
To perform a complete reset of the CP, the value $8001 should be written to the CR. Fol-
lowing this command, the CR will return the value $0000 in two clocks.
To execute an ENTER HUNT MODE command to SCC3, the value $0381 should be written
to the CR. While the command is executing, the CR will return the value $0381. When the
command has been completely executed, the CR will return the value $0380.
7.2.2 Command Execution Latency
The worst-case command execution latency is 120 clocks. The typical command execution
latency is about 40 clocks.
7.3 DUAL-PORT RAM
The CPM has 2560 bytes of static RAM configured as dual-port memory. The dual-port RAM
memory map is shown in Figure 7-2, and a block diagram is shown in Figure 7-3.
7-8
0 = The CP is ready to receive a new command.
1 = The CR contains a command that the CP is currently processing. The CP clears
this bit at the end of the command execution or after reset.
MBAR POINTS
TO THE BASE
Figure 7-2. Dual-Port RAM Memory Map
Freescale Semiconductor, Inc.
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BDs/DATA IN ANY UNUSED SPACE
PARAMETER RAM—768 BYTES
BDs/DATA/UCODE—512 BYTES
BDs/DATA/UCODE—256 BYTES
BDs/DATA/UCODE—512 BYTES
BDs/DATA—512 BYTES
TOTAL 2560 BYTES

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