MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 499

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

The receive errors (overrun, nonoctet aligned frame, CD lost, aborted frame, and CRC error)
are reported through the Rx BD. The transmit errors (underrun and CTS lost) are reported
through the Tx BD.
7.10.17.6 HDLC COMMAND SET. The following transmit and receive commands are
issued to the CR.
7.10.17.6.1 Transmit Commands. The following paragraphs describe the HDLC transmit
commands.
STOP TRANSMIT Command . After a hardware or software reset and the enabling of the
channel in the SCC mode register, the channel is in the transmit enable mode and starts
polling the first BD in the table every 64 transmit clocks (immediately if the TOD bit in the
TODR is set).
The channel STOP TRANSMIT command disables the transmission of frames on the trans-
mit channel. If this command is received by the HDLC controller during frame transmission,
transmission is aborted after a maximum of 64 additional bits are transmitted, and the trans-
mit FIFO is flushed. The TBPTR is not advanced, no new BD is accessed, and no new
frames are transmitted for this channel. The transmitter will transmit an abort sequence con-
sisting of 01111111 (if the command was given during frame transmission) and then begin
to transmit flags or idles, as indicated by the HDLC mode register.
GRACEFUL STOP TRANSMIT Command . The channel GRACEFUL STOP TRANSMIT
command is used to stop transmission in an orderly way rather than abruptly, as performed
by the regular STOP TRANSMIT command. It stops transmission after the current frame has
completed transmission, or immediately if there is no frame being transmitted. The GRA bit
in the SCCE will be set once transmission has stopped. After transmission ceases, the
HDLC transmit parameters, including BDs, may be modified. The TBPTR will point to the
next Tx BD in the table. Transmission will begin once the R-bit of the next BD is set and the
RESTART TRANSMIT command is issued.
RESTART TRANSMIT Command . The RESTART TRANSMIT command enables the trans-
mission of characters on the transmit channel. This command is expected by the HDLC con-
troller after a STOP TRANSMIT command, after a STOP TRANSMIT command and
disabling the channel in its SCC mode register, after a GRACEFUL STOP TRANSMIT com-
mand, or after a transmitter error (underrun or CTS lost when no automatic frame retrans-
mission is performed). The HDLC controller will resume transmission from the current
TBPTR in the channel’s Tx BD table.
INIT TX PARAMETERS Command . This command initializes all transmit parameters in this
serial channel’s parameter RAM to their reset state. This command should only be issued
If the MFF bit in the PSMR is set, then it is possible for one or
more small frames to be flushed from the transmit FIFO. To
avoid this, the GRACEFUL STOP TRANSMIT command may be
used.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
Serial Communication Controllers (SCCs)