MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 916

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Development Tools and Support
The X.25 module features are as follows:
The EDX module features are as follows:
B-4
• Supports external loopback between two QUICC serial channels or on the same serial
• Trace option for reporting to system management each primitive issued by the LAPB
• Fully implements 1988 CCITT Recommendation X.25, chapters 3.1–7.3
• May be used with both layer 2 modules: LAPD or LAPB
• Unlimited number of layer 2 interfaces
• Supports up to 4095 logical channels for each interface
• Many DTE/DCE interface parameters (configurable for each interface):
• Layer 4 message fragmentation/assembly using M-BIT
• Q-BIT support
• All standard CCITT X.25 facilities
• Compatible with X.213 interface primitives
• Logical channel parameters (configurable for each interface):
• Message-oriented interface
• Independent of layer 2 and layer 4 implementation
• The EDX event-driven executive is an operating system kernel that provides:
• EDX was designed to be:
channel
module to layer 3 or layer 2 management
—DTE/DCE
—Modulo 8 or 128 operation
—Window size
—Maximum receive and transmit packet lengths
—Interface ID
—DTE/DCE
—Permanent virtual circuit/virtual call
—D-BIT support
—On-line registration support
—TOA/NPI address mode
—Fast select facility support
—Logical channel (and group) numbers
—Protocol parameters (w, T11, T12, T21, T22, N12, N13)
—Maximum data packet length (unlimited)
—Multitasking with simple task scheduling
—Message passing between tasks
—Memory allocation
—Fast (written mostly in M68000-family assembler)
—Efficient (uses approximately 1.5 Kbytes of ROM)
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com