MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 743

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

9.3.4.3 INTERNAL REGISTERS (SYSTEM INTEGRATION BLOCK). Both the MC68302
and the QUICC have a number of internal registers. The following paragraphs detail the reg-
isters according to their ascending order in the MC68302 memory map. Note that the
address offsets of these registers on the QUICC are different from the address offsets on
the MC68302.
IDMA
The MC68302 CMR is closely related to the QUICC CMR.
SAPR on the MC68302 is identical to SAPR on the QUICC.
DAPR on the MC68302 is identical to DAPR on the QUICC.
BCR on the MC68302 is increased to 32 bits on the QUICC.
CSR on the MC68302 is extended on the QUICC.
The QUICC contains a CMAR that is not available on the MC68302.
The FCR is the same on both parts, except that the QUICC has a provision for four function
code lines; whereas, the MC68302 only has three.
INTERRUPTS
The GIMR on the MC68302 is most closely related to the QUICC CICR and AVR.
For the transparent protocol, neither the MC68302 nor the QUICC requires parameter
RAM for its implementation. The QUICC, however, offers the new feature of allowing
CRCs to be generated and checked on transparent frames. In that case, the QUICC's
transparent parameter RAM must be initialized.
The STR, RST, and BT bits are the same on both parts.
The DSIZE bits are compatible, but on the QUICC, an encoding exists for long-word size.
The DAPI, SAPI, and REQG bits are the same.
INTE and INTN are, in effect, moved to the CMAR, but more control is given to the user.
ECO is in bit 15 of the QUICC CMR.
The QUICC CMR contains new functions in the RCI, S/D, and SRM bits.
The DONE, BED, and BES bits are the same on both parts.
The DNS bit is not needed on the QUICC.
The QUICC additionally contains the OB and BRKP bits.
The V7–V5 bits become the VBA2–VBA0 bits.
The ET1, ET6, and ET7 bits control the edge/level sensitivity of the IRQ1, IRQ6, and IRQ7
pins on the MC68302. On the QUICC, these pins are handled by the SIM60. On the
SIM60, all IRQx pins except IRQ7 are level sensitive. These bits do not exist on the
QUICC.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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