MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 37

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Because of the similarity of the QUICC SIM60 and CPU to other members of the M68300
family, such as the MC68332 and the MC68340, previous users of these devices will be
comfortable with these same features on the QUICC.
1.3.2 Hardware Compatibility Issues
The following list summarizes the hardware differences between the MC68302 and the
QUICC:
1.3.3 Software Compatibility Issues
The following list summarizes the major software differences between the MC68302 and the
QUICC:
• Pinout—The pinout is not the same. The QUICC has 240 pins; the MC68302 has 132
• Package—Both devices offer PGA and PQFP packages. However, the QUICC
• System Bus—The system bus signals now look like those of the MC68030 as opposed
• System Bus in Slave Mode—A number of QUICC pins take on new functionality in slave
• Peripheral Timing—The external timings of the peripherals (SCCs, timers, etc.) are very
• Pin Assignments—The assignment of peripheral functions to I/O pins is different in sev-
• Since the CPU32+ is a superset of the M68000 instruction set, all previously written
• The QUICC contains an 8-Kbyte block of memory as opposed to a 4-Kbyte block
• The code used to initialize the system integration features of the MC68302 has
• As much as possible, QUICC CPM features were made identical to those of the
• Although the registers used to initialize the QUICC CPM are new (for example, the SCM
pins.
PQFP package has a 20-mil pitch; whereas, the MC68302 PQFP package has a
25-mil pitch.
to those of the M68000. It is still possible to interface M68000 peripherals to the QUICC,
utilizing the same techniques used to interface them to an MC68020 or MC68030.
mode to support an external MC68EC040. On the MC68302, the pin names generally
remained the same in slave mode.
similar (if not identical) to corresponding peripherals on the MC68302.
eral ways. First, the QUICC contains more general-purpose parallel I/O pins than the
MC68302. However, the QUICC offers many more functions than even a 240-pin pack-
age would normally allow, resulting in more multifunctional pins than the MC68302.
code will run. However, if such code is accessing the MC68302 peripherals, it will re-
quire some modification.
on the MC68302. The register addresses within that memory map are different.
to be modified to write the corresponding features on the QUICC SIM60. Code written
for the MC68340 may be adapted in large part.
MC68302 CP. The most important benefit is that the code flow (if not the code itself) will
port easily from the MC68302 to the QUICC. The nuances learned from the MC68302
will still be useful in the QUICC.
on the MC68302 is replaced with the GSMR and PSMR on the QUICC), most registers
retain their original purpose such as the SCC event, SCC mask, SCC status, and com-
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
Introduction