MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 183

IC MPU QUICC 25MHZ 240-FQFP

MC68EN360CAI25L

Manufacturer Part Number
MC68EN360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Series
MC68000r

Specifications of MC68EN360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Core Size
32 Bit
Cpu Speed
25MHz
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
No. Of Pins
240
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Family Name
M68xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EN360CAI25L
Manufacturer:
APLHA
Quantity:
12 000
Part Number:
MC68EN360CAI25L
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EN360CAI25L
Manufacturer:
FREESCALE
Quantity:
20 000
.
When the aborted bus cycle is an instruction prefetch, the processor will not initiate excep-
tion processing unless the prefetched information is used. For example, if a branch instruc-
tion flushes an aborted prefetch, that word is not accessed, and no exception occurs.
When the aborted bus cycle is a data access, the processor initiates exception processing
immediately, except in the case of released operand writes. Released write bus errors are
delayed until the next instruction boundary or until another operand access is attempted.
Exception processing for bus error exceptions follows the regular sequence, but context
preservation is more involved than for other exceptions because a bus exception can be ini-
Freescale Semiconductor, Inc.
Figure 5-11. Reset Operation Flowchart
PREFETCH 3 WORDS
(VECTOR # 0)
(VECTOR # 1)
FETCH VECTOR # 0
FETCH VECTOR # 1
OTHERWISE BEGIN
For More Information On This Product,
INSTRUCTION
OTHERWISE
OTHERWISE
EXECUTION
$7
$0
ENTRY
1
0
EXIT
S
T0,T1
I2:IO
VBR
MC68360 USER’S MANUAL
Go to: www.freescale.com
SP
PC
BUS ERROR
BUS ERROR
BUS ERROR/
ADDRESS
ERROR
ASSERT HALT
EXIT
(DOUBLE BUS FAULT)
CPU32+

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