MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 483

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Bit 5—Reserved
PEN—Parity Enable
RPM—Receiver Parity Mode
TPM—Transmitter Parity Mode
7.10.16.16 UART RECEIVE BUFFER DESCRIPTOR (RX BD). The CP reports informa-
tion concerning the received data on a per-buffer basis via Rx BDs.
The CP closes the current buffer, generates a maskable interrupt, and starts to receive data
into the next buffer after one of the following events:
The RPM bits select the type of parity check to be performed by the receiver. The RPM
bits can be modified on the fly.
When odd parity is selected, the transmitter will count the number of ones in the data
word. If the total number of ones is not an odd number, the parity bit is set to one and thus
produces an odd number. If the receiver counts an even number of ones, an error in trans-
mission has occurred. In the same manner, for even parity, an even number must result
from the calculation performed at both ends of the line. In high/low parity (sometimes
called mark/space parity), if the parity bit is not high/low, a parity error is reported.
The TPM bits select the type of parity to be performed for the transmitter. The TPM bits
can be modified on the fly.
1. Receiving a user-defined control character (when the reject bit = 0 in the control char-
2. Detecting an error during message processing
3. Detecting a full receive buffer
4. Receiving a MAX_IDL number of consecutive idle characters
5. Issuing the ENTER HUNT MODE command
6. Issuing the CLOSE Rx BD command
0 = No Parity
1 = Parity is enabled and determined by the parity mode bits.
00 = Odd Parity
01 = Low Parity (always check for a zero in the parity bit position)
10 = Even Parity
11 = High Parity (always check for a one in the parity bit position)
00 = Odd Parity
01 = Force Low Parity (always send a zero in the parity bit position)
10 = Even Parity
11 = Force High Parity (always send a one in the parity bit position)
acter table entry)
The receive parity errors cannot be disabled, but can be ignored
if desired.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
Serial Communication Controllers (SCCs)