MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 930

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

RISC Microcode from RAM
C.6 ENHANCED ETHERNET FILTERING
The enhanced Ethernet filtering microcode has been created to add a bit more flexibility to
the current Ethernet Controller. It allows the user to perfectly accept or reject frames with
destination addresses that are contained in a table of 24 entries. In addition to the filtering
capability, the microcode adds the ability to replace the externally sampled tag byte with one
that is extracted from the address table.
C.6.1 Key Features
C.6.2 Performance
The overhead incurred by the filtering algorithm will depend upon the number of entries in
the address table. Table C-5 shows possible configurations of other channels given the load
added by a number of entries in the address table.
C-8
• End Delimiter (ED) generation/checking
• Init Rx/Tx, Stop TX, Restart TX and Enter Hunt Mode Commands
• Token Rotation Timer, Idle Timer, Slot Timer and Time-out Timer
• Consumes 1280 bytes of the QUICC’s internal memory.
• Can accept or reject incoming frames if the destination MAC address is contained in a
• Allows a shorter list to obtain better peripheral performance.
• Can optionally tag incoming accepted frames with an 8-bit tag appended to the end of
• The filtering can be turned off to allow tagging with no frame rejection.
• Can filter on group and individual addresses.
• Is a “small” microcode (consumes 768 bytes of DPRAM).
• Filtering is only supported on one Ethernet channel (SCC1), the other channel operates
list of 24 preprogrammed entries.
the frame (rather than using a CAM).
normally.
Number of addresses
17-24
9-16
1-8
Freescale Semiconductor, Inc.
For More Information On This Product,
Table C-5. Channel Configuration
MC68360 USER’S MANUAL
Go to: www.freescale.com
Possible Configuration of Other Channels
1 x 10 Mbit Ethernet, 1 x 200 Kbit HDLC
1 x 10 Mbit Ethernet, 1 x 200 Kbit HDLC
1 x 10 Mbit Ethernet