MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 515

IC MPU QUICC 25MHZ 240-FQFP

MC68EN360CAI25L

Manufacturer Part Number
MC68EN360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Series
MC68000r

Specifications of MC68EN360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Core Size
32 Bit
Cpu Speed
25MHz
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
No. Of Pins
240
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Family Name
M68xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EN360CAI25L
Manufacturer:
APLHA
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12 000
Part Number:
MC68EN360CAI25L
Manufacturer:
Freescale Semiconductor
Quantity:
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Part Number:
MC68EN360CAI25L
Manufacturer:
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Quantity:
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Figure 7-55 shows the other LAN-type configuration of HDLC bus. In this configuration, a
master station transmits to any slave station, with no collisions possible. The slaves com-
municate only with the master, but may experience collisions in their access over the bus.
In this configuration, a slave that must communicate with another slave must first transmit
its data to the master, where the data is buffered in RAM and then retransmitted to the other
slave. The benefit of this configuration, however, is that full-duplex operation may be
obtained. This configuration is preferred in a point-to-multipoint environment.
NOTES:
NOTES:
1. Transceivers may be used to extend the LAN size, if necessary.
2. The TXD pins of slave devices should be configured to open-drain in the port C parallel I/O port.
RXD
1. Transceivers may be used to extend the LAN size, if necessary.
2. The TXD pins should be configured to open-drain in the port C parallel I/O port.
RXD
CONTROLLER
MASTER
CONTROLLER
HDLC
HDLC-BUS
Figure 7-55. HDLC Bus Single-Master Configuration
TXD
MASTER
A
Figure 7-54. HDLC Bus Multi-Master Configuration
TXD
A
Freescale Semiconductor, Inc.
CTS
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
HDLC-BUS LAN
RXD
RXD
CONTROLLER
HDLC BUS
HDLC-BUS LAN
CONTROLLER
SLAVE
TXD
HDLC-BUS
MASTER
B
TXD
B
CTS
CTS
Serial Communication Controllers (SCCs)
RXD
RXD
CONTROLLER
HDLC BUS
CONTROLLER
SLAVE
HDLC-BUS
TXD
MASTER
C
TXD
C
CTS
CTS
R
R
+5
+5

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