MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 774

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Applications
9.6 INTERFACING THE QUICC TO THE 53C90 SCSI CONTROLLER
In the late 1970's, Schugart and Associates introduced a parallel bus called Schugart Asso-
ciates system interface (SASI). Because of SASI's generic nature and ability to function as
a device-independent peripheral or system bus, other manufacturers quickly adopted it. In
1982, ANSI standardized an enhanced version of SASI renaming it the small computer sys-
tem interface (SCSI). Since its standardization as a bus and due to its diverse potential,
SCSI has enjoyed great popularity as an alternative means to network-dissimilar high-per-
formance hosts.
The following paragraphs give a general description of the SCSI bus, including its major sig-
nals and functions. The hardware and software interface between the QUICC and the
53C90 SCSI controller is also discussed. This subsection highlights an example of a QUICC
IDMA channel and the memory controller features that allow the QUICC to interface to
slower peripherals.
9.6.1 SCSI General Overview
SCSI is an 8-bit, parallel I/O bus that provides a host computer with the capability of adding
different disk drives, tape drives, printers, and even communication devices without major
modifications to the system hardware or software. It uses logical rather than physical
addressing for all data blocks.
A maximum of eight devices can be attached to the SCSI bus. Of these eight, only one pair
of devices can communicate at one time. Each SCSI device has an ID bit assigned to it that
is the bit-significant representation of the SCSI address referring to one of the signal lines
DB7–DB0. DB7 has the highest priority. When two devices communicate over the SCSI bus,
one acts as an initiator (host), and the other acts as a target (controller). The initiator origi-
nates the operation, and the target performs the operation.
9.6.2 Physical Interface
The physical bus interface is composed of a group of characteristics: speed, bus signals,
and device count.
Speed, the ability to transfer data, uses two handshaking protocols: synchronous and asyn-
chronous. Synchronous transfers a series of bytes before the handshake occurs; whereas,
asynchronous requires a handshake for every byte transferred. Rates up to 6 Mbytes/sec
can be accomplished asynchronously; 10 Mbytes/sec is possible on the synchronous pro-
tocol.
SCSI devices are daisy-chained using a common cable. This 50-conductor cable is used by
the bus signals to interchange data, commands, status, and message information. Table 9-
1 and Figure 9-17 describe the SCSI bus signals.
9-54
Depending on the assembler used, the acronyms DTT and ITT
may have to be used instead of DAC and IAC.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE